* remove mandatory command-line options of simtests

Change-Id: I4de943a230e3636b1fdee7fb56c78e314e20250f

Philipp Spilger authored 5 years ago and Yannik Stradmann committed 5 years ago

Depends-On: 7206
Change-Id: Ia393710a020d554cb0a4c354a1dd77327d2c3ec4

Change-Id: Iadd3d26d4d0df7f2efa1f9720d21461a663722ad

Change-Id: I72059b7a7dd11857b7af5a31bc6a46e157e8c258

* Fixes Issue 3278

Change-Id: I687f56ea7f1dbf0655cc957087c6743ee49af8d2

Depends-On: 8258
Change-Id: I45db83250a82f258312069a3af433d3b267476d0

Change-Id: I5f629b8c0e0cf308942708f175261cb080e4b26d

* constant wait period of 10000us=10ms is OOM larger than real
  round-trip time
* minimal latency reduced from 10000us to ~80us (best-case)
  for sending only halt and waiting for response

Change-Id: I43487e59164c24ca2e08827e1ecf6dcd115d8e1d

Change-Id: I64fabdf18646d50fa6cba15860e5c0c967420300

* reduce line count for Spike payload

Change-Id: I9e9ad38110e91a321bda88d304ffebea3ec6d081

Change-Id: I5d9519131e3cce44040b5d166c016f8a07dbecab

Change-Id: I4859c8f49a398163522e244355e78c7aedd6ac74

Change-Id: Ia61c1c2b4bac8853270d6cb7d5c1fad230ba5f66

Change-Id: I5ad92b50613b9779c772fb74fea04ff509282e1d

* add custom macros to support compile-time disabling

Change-Id: I4a406613efb26375358fd5da672185f2fa0203bd

Depends-On: 8150
Change-Id: I82f3175bb852599ea37fdaa91e02ddd79869c291

* remove unused boost system dependency

Change-Id: I5d11faeae2d840b51eeeff129a13a2ba7fd31cdd

Depends-On: 8024,8120
Change-Id: I29cf62d3a955fcaba48ba4f79282e28ce5b72452

* fix operator== error of omnibus_to_fpga::Address

Change-Id: If830f8e3a49904383a20867f21bea7740dd98a10

* spelling error fix

Change-Id: Ifd9c5ac9eaf517da5e3c14ea512a8f7e73139142

Change-Id: I54403b64e8680095ea19b8b799641812c870475e

* not needed due to flange python bindings

Change-Id: Ic2449924d81ac8291f933372493073baad8c539c

Change-Id: Id8ac4ebc736bbadb8a893a9ea894f3f8b9011c56

* format was UTMessage(<RAW>)
* format now is UTMessage(raw: <RAW>, payload: <PAYLOAD>)
  with <PAYLOAD> = name::space::PayloadName(number/hex/bits/logical)
* changes necessary to Number and Ranged payload, as halco wrapper
  don't allow overloading the ostream operator, because they already
  define a operator<<(ostream, Derived) with Derived being the Number
  or Ranged class here

Change-Id: Ia2b21174777902006e61b8108123f73f92a53ce4

Depends-On: 7469
Change-Id: Iddd192b35476fda64361cd26fb8883e1421bcb9e

Change-Id: Iefad48fd8618b54e96e613b1d3465e030e92d5b1

Change-Id: Iebe3a31497bd4e36b261d82cde16cd922e5ec436

Change-Id: Idab3c25814eb62e649bc88de793d56d857eab678

Depends-On: 6767,6771,6773,6777
Change-Id: I55b8ec77dc04a44a44a9b33ac3c0dc547e352b00

Change-Id: I7599050c600da6e892acbc77f7730bb705fd94b6

Change-Id: I50d9ad07db225321b233931e5f6d7ca8b6845f67

Change-Id: I4f68d09db384eadf2136de53833112f0a485e6e6

Change-Id: I85cbae1a6b8d11f52f9ed91bee445fbd42e9676f

* Allows using an instruction as halt which also encodes other information
  via a different payload.

Change-Id: I61b8a2ec8f5d55d3f8f4ad67d9a2ca2deff8135f

* additionally fix spelling error in documentation of UTMessage helper structs

Depends-On:6228

Change-Id: I92fbe5686c3401f3ebfd71d41ec31b29fffddc71

* add event packing to up to three for to FPGA spikes, from Chip spikes
  and MADC sample events
* add systime init and sys{time,delta} time response instructions

Depends-On: 6228
Change-Id: I97b3f2f4079bb7b8f469ee1d15b7134af294220f

Change-Id: I8db565f053bfa76a055d8b1258043d29ee615ca3

Depends-On: 7178,7179
Change-Id: I82097fa42f932e5f8cc9e911025a9f044eec7843

* ARQConnection now has a default constructor with from-env IP extraction
* HW tests don't need command-line arguments or hard-coded IP address anymore

Change-Id: I644e77597778e8275e83e7a7db38b28437b4ceaf

Change-Id: I106020ea364734a2fb4c75dfedea51a115202d29