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EBRAINS RI
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BrainScaleS
hxcomm
Commits
dcd4c1ab
Commit
dcd4c1ab
authored
10 months ago
by
Jakob Kaiser
Browse files
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chore: wscript rename 'DLSvx_HARDWARE_AVAILABLE' to 'BBS_HARDWARE_AVAILABLE'
Change-Id: I51a1bf04e2166a2dfbb2b489dbeb0d54baf0cab1
parent
a40c5792
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2 changed files
pyhxcomm/wscript
+2
-2
2 additions, 2 deletions
pyhxcomm/wscript
wscript
+2
-2
2 additions, 2 deletions
wscript
with
4 additions
and
4 deletions
pyhxcomm/wscript
+
2
−
2
View file @
dcd4c1ab
...
@@ -34,7 +34,7 @@ def configure(cfg):
...
@@ -34,7 +34,7 @@ def configure(cfg):
def
build
(
bld
):
def
build
(
bld
):
bld
.
env
.
DLSvx
_HARDWARE_AVAILABLE
=
"
SLURM_HWDB_YAML
"
in
os
.
environ
bld
.
env
.
BBS
_HARDWARE_AVAILABLE
=
"
SLURM_HWDB_YAML
"
in
os
.
environ
bld
.
env
.
DLSvx_SIM_AVAILABLE
=
"
FLANGE_SIMULATION_RCF_PORT
"
in
os
.
environ
bld
.
env
.
DLSvx_SIM_AVAILABLE
=
"
FLANGE_SIMULATION_RCF_PORT
"
in
os
.
environ
pyhxcomm_defines
=
[
pyhxcomm_defines
=
[
...
@@ -88,7 +88,7 @@ def build(bld):
...
@@ -88,7 +88,7 @@ def build(bld):
pythonpath
=
[
'
tests
'
],
pythonpath
=
[
'
tests
'
],
pylint_config
=
join
(
get_toplevel_path
(),
"
code-format
"
,
"
pylintrc
"
),
pylint_config
=
join
(
get_toplevel_path
(),
"
code-format
"
,
"
pylintrc
"
),
pycodestyle_config
=
join
(
get_toplevel_path
(),
"
code-format
"
,
"
pycodestyle
"
),
pycodestyle_config
=
join
(
get_toplevel_path
(),
"
code-format
"
,
"
pycodestyle
"
),
skip_run
=
not
(
bld
.
env
.
DLSvx_SIM_AVAILABLE
or
bld
.
env
.
DLSvx
_HARDWARE_AVAILABLE
),
skip_run
=
not
(
bld
.
env
.
DLSvx_SIM_AVAILABLE
or
bld
.
env
.
BBS
_HARDWARE_AVAILABLE
),
test_timeout
=
120
,
test_timeout
=
120
,
)
)
...
...
This diff is collapsed.
Click to expand it.
wscript
+
2
−
2
View file @
dcd4c1ab
...
@@ -153,7 +153,7 @@ def build_loopbackconnection_test(bld):
...
@@ -153,7 +153,7 @@ def build_loopbackconnection_test(bld):
def
build
(
bld
):
def
build
(
bld
):
bld
.
env
.
DLSvx
_HARDWARE_AVAILABLE
=
"
SLURM_HWDB_YAML
"
in
os
.
environ
bld
.
env
.
BBS
_HARDWARE_AVAILABLE
=
"
SLURM_HWDB_YAML
"
in
os
.
environ
bld
.
env
.
DLSvx_SIM_AVAILABLE
=
"
FLANGE_SIMULATION_RCF_PORT
"
in
os
.
environ
bld
.
env
.
DLSvx_SIM_AVAILABLE
=
"
FLANGE_SIMULATION_RCF_PORT
"
in
os
.
environ
use_munge
=
[
"
MUNGE
"
]
if
bld
.
env
.
build_with_munge
else
[]
use_munge
=
[
"
MUNGE
"
]
if
bld
.
env
.
build_with_munge
else
[]
...
@@ -259,7 +259,7 @@ def build(bld):
...
@@ -259,7 +259,7 @@ def build(bld):
target
=
'
hxcomm_backendtest
'
,
target
=
'
hxcomm_backendtest
'
,
features
=
'
gtest cxx cxxprogram
'
,
features
=
'
gtest cxx cxxprogram
'
,
source
=
bld
.
path
.
ant_glob
(
'
tests/hw/hxcomm/test-*.cpp
'
),
source
=
bld
.
path
.
ant_glob
(
'
tests/hw/hxcomm/test-*.cpp
'
),
skip_run
=
not
(
bld
.
env
.
DLSvx
_HARDWARE_AVAILABLE
or
bld
.
env
.
DLSvx_SIM_AVAILABLE
),
skip_run
=
not
(
bld
.
env
.
BBS
_HARDWARE_AVAILABLE
or
bld
.
env
.
DLSvx_SIM_AVAILABLE
),
test_main
=
'
tests/common/src/main.cpp
'
,
test_main
=
'
tests/common/src/main.cpp
'
,
use
=
[
'
hxcomm
'
,
'
hxcomm_tests_helper
'
,
'
BOOST4HXCOMMTOOLS
'
],
use
=
[
'
hxcomm
'
,
'
hxcomm_tests_helper
'
,
'
BOOST4HXCOMMTOOLS
'
],
test_timeout
=
120
,
test_timeout
=
120
,
...
...
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