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Commit e6590208 authored by Tobias Thommes's avatar Tobias Thommes
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Add coordinates for Extoll Barrier configuration 

Depends-On: 18490
Change-Id: Ia0cf396d3247688eca1ce437f3c6eee01787d80b
parent 9850d807
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with 417 additions and 2 deletions
include/halco/hicann-dls/vx/extoll.h
+ 282
− 2
View file @ e6590208
......@@ -4,17 +4,82 @@
#include "halco/common/genpybind.h"
#include "halco/common/geometry.h"
#include "halco/common/mixin.h"
#include "halco/hicann-dls/vx/omnibus.h"
namespace halco::hicann_dls::vx GENPYBIND_TAG_HALCO_HICANN_DLS_VX {
// the RantWrapper is needed, as BaseType is not supported for mixins.
// We limit the range to the size of the Tourmalet-RF which has 23-bit address-space.
struct GENPYBIND(inline_base("*")) ExtollAddress
: public common::detail::BaseType<ExtollAddress, uint64_t>
: public common::detail::RantWrapper<ExtollAddress, uint64_t, 0x007f'ffffull, 0>
{
constexpr explicit ExtollAddress(uintmax_t const val = 0) GENPYBIND(implicit_conversion) :
base_t(val)
rant_t(val)
{}
};
struct GENPYBIND(inline_base("*")) ExtollChipType
: public common::detail::RantWrapper<ExtollChipType, uint8_t, 1, 0>
{
constexpr explicit ExtollChipType(uintmax_t const val = 0) GENPYBIND(implicit_conversion) :
rant_t(val)
{}
static const ExtollChipType fpga;
static const ExtollChipType tourmalet;
};
HALCO_COORDINATE_MIXIN(ChipTypeMixin, ExtollChipType, chip_type)
struct GENPYBIND(inline_base("*")) ExtollNodeId
: public common::detail::RantWrapper<ExtollNodeId, uint32_t, 0x1'0000ull, 0>
{
constexpr explicit ExtollNodeId(uintmax_t const val = 0) GENPYBIND(implicit_conversion) :
rant_t(val)
{}
static const ExtollNodeId self;
};
struct GENPYBIND(inline_base("*ChipTypeMixin*")) ExtollNodeIdOnExtollNetwork
: public ChipTypeMixin<ExtollNodeIdOnExtollNetwork, ExtollNodeId>
{
explicit ExtollNodeIdOnExtollNetwork(
ExtollNodeId const& nodeid = ExtollNodeId(halco::hicann_dls::vx::ExtollNodeId::self),
ExtollChipType const& chiptype =
ExtollChipType(halco::hicann_dls::vx::ExtollChipType::fpga)) :
mixin_t(nodeid, chiptype)
{}
explicit ExtollNodeIdOnExtollNetwork(enum_type const& e) : mixin_t(e) {}
ExtollNodeId toExtollNodeId() const
{
return This();
}
};
HALCO_COORDINATE_MIXIN(NodeIdMixin, ExtollNodeIdOnExtollNetwork, node_id)
struct GENPYBIND(inline_base("*NodeIdMixin*")) ExtollAddressOnExtollNetwork
: public NodeIdMixin<ExtollAddressOnExtollNetwork, ExtollAddress>
{
ExtollAddressOnExtollNetwork() = default;
explicit ExtollAddressOnExtollNetwork(
ExtollAddress const& extaddr,
ExtollNodeIdOnExtollNetwork const& nodeid =
ExtollNodeIdOnExtollNetwork(halco::hicann_dls::vx::ExtollNodeIdOnExtollNetwork::self)) :
mixin_t(extaddr, nodeid)
{}
explicit ExtollAddressOnExtollNetwork(enum_type const& e) : mixin_t(e) {}
ExtollAddress toExtollAddress() const
{
return This();
}
};
/*
* FPGA-Event-Switch:
......@@ -498,11 +563,226 @@ struct GENPYBIND(inline_base("*SpikeCommSplitMixin*"))
};
/*
* BARRIER & INTERRUPT:
*/
struct GENPYBIND(inline_base("*")) ExtollBarrierTriggerReachedOnExtollNodeId
: public common::detail::
RantWrapper<ExtollBarrierTriggerReachedOnExtollNodeId, uint_fast8_t, 15, 0>
{
constexpr explicit ExtollBarrierTriggerReachedOnExtollNodeId(uintmax_t const val = 0)
GENPYBIND(implicit_conversion) :
rant_t(val)
{}
};
struct GENPYBIND(inline_base("*NodeIdMixin*")) ExtollBarrierTriggerReachedOnExtollNetwork
: public NodeIdMixin<
ExtollBarrierTriggerReachedOnExtollNetwork,
ExtollBarrierTriggerReachedOnExtollNodeId>
{
ExtollBarrierTriggerReachedOnExtollNetwork() = default;
explicit ExtollBarrierTriggerReachedOnExtollNetwork(
ExtollBarrierTriggerReachedOnExtollNodeId const& control,
ExtollNodeIdOnExtollNetwork const& nodeid =
ExtollNodeIdOnExtollNetwork(halco::hicann_dls::vx::ExtollNodeIdOnExtollNetwork::self)) :
mixin_t(control, nodeid)
{}
explicit ExtollBarrierTriggerReachedOnExtollNetwork(enum_type const& e) : mixin_t(e) {}
ExtollBarrierTriggerReachedOnExtollNodeId toExtollBarrierTriggerReachedOnExtollNodeId() const
{
return This();
}
};
struct GENPYBIND(inline_base("*")) ExtollBarrierReleasedOnExtollNodeId
: public common::detail::RantWrapper<ExtollBarrierReleasedOnExtollNodeId, uint_fast8_t, 15, 0>
{
constexpr explicit ExtollBarrierReleasedOnExtollNodeId(uintmax_t const val = 0)
GENPYBIND(implicit_conversion) :
rant_t(val)
{}
};
struct GENPYBIND(inline_base("*NodeIdMixin*")) ExtollBarrierReleasedOnExtollNetwork
: public NodeIdMixin<ExtollBarrierReleasedOnExtollNetwork, ExtollBarrierReleasedOnExtollNodeId>
{
ExtollBarrierReleasedOnExtollNetwork() = default;
explicit ExtollBarrierReleasedOnExtollNetwork(
ExtollBarrierReleasedOnExtollNodeId const& control,
ExtollNodeIdOnExtollNetwork const& nodeid =
ExtollNodeIdOnExtollNetwork(halco::hicann_dls::vx::ExtollNodeIdOnExtollNetwork::self)) :
mixin_t(control, nodeid)
{}
explicit ExtollBarrierReleasedOnExtollNetwork(enum_type const& e) : mixin_t(e) {}
ExtollBarrierReleasedOnExtollNodeId toExtollBarrierReleasedOnExtollNodeId() const
{
return This();
}
};
struct GENPYBIND(inline_base("*")) LinkOnExtollNode
: public common::detail::RantWrapper<LinkOnExtollNode, uint_fast8_t, 6, 0>
{
constexpr explicit LinkOnExtollNode(uintmax_t const val = 0) GENPYBIND(implicit_conversion) :
rant_t(val)
{}
};
struct GENPYBIND(inline_base("*")) ExtollBarrierConfigOnExtollNodeId
: public common::detail::RantWrapper<ExtollBarrierConfigOnExtollNodeId, uint_fast8_t, 15, 0>
{
constexpr explicit ExtollBarrierConfigOnExtollNodeId(uintmax_t const val = 0)
GENPYBIND(implicit_conversion) :
rant_t(val)
{}
};
struct GENPYBIND(inline_base("*NodeIdMixin*")) ExtollBarrierConfigOnExtollNetwork
: public NodeIdMixin<ExtollBarrierConfigOnExtollNetwork, ExtollBarrierConfigOnExtollNodeId>
{
ExtollBarrierConfigOnExtollNetwork() = default;
explicit ExtollBarrierConfigOnExtollNetwork(
ExtollBarrierConfigOnExtollNodeId const& config,
ExtollNodeIdOnExtollNetwork const& nodeid =
ExtollNodeIdOnExtollNetwork(halco::hicann_dls::vx::ExtollNodeIdOnExtollNetwork::self)) :
mixin_t(config, nodeid)
{}
explicit ExtollBarrierConfigOnExtollNetwork(enum_type const& e) : mixin_t(e) {}
ExtollBarrierConfigOnExtollNodeId toExtollBarrierConfigOnExtollNodeId() const
{
return This();
}
};
struct GENPYBIND(inline_base("*")) ExtollInterruptControlOnExtollNodeId
: public common::detail::RantWrapper<ExtollInterruptControlOnExtollNodeId, uint_fast8_t, 3, 0>
{
constexpr explicit ExtollInterruptControlOnExtollNodeId(uintmax_t const val = 0)
GENPYBIND(implicit_conversion) :
rant_t(val)
{}
};
struct GENPYBIND(inline_base("*NodeIdMixin*")) ExtollInterruptControlOnExtollNetwork
: public NodeIdMixin<
ExtollInterruptControlOnExtollNetwork,
ExtollInterruptControlOnExtollNodeId>
{
ExtollInterruptControlOnExtollNetwork() = default;
explicit ExtollInterruptControlOnExtollNetwork(
ExtollInterruptControlOnExtollNodeId const& control,
ExtollNodeIdOnExtollNetwork const& nodeid =
ExtollNodeIdOnExtollNetwork(halco::hicann_dls::vx::ExtollNodeIdOnExtollNetwork::self)) :
mixin_t(control, nodeid)
{}
explicit ExtollInterruptControlOnExtollNetwork(enum_type const& e) : mixin_t(e) {}
ExtollInterruptControlOnExtollNodeId toExtollInterruptControlOnExtollNodeId() const
{
return This();
}
};
struct GENPYBIND(inline_base("*")) ExtollInterruptConfigOnExtollNodeId
: public common::detail::RantWrapper<ExtollInterruptConfigOnExtollNodeId, uint_fast8_t, 15, 0>
{
constexpr explicit ExtollInterruptConfigOnExtollNodeId(uintmax_t const val = 0)
GENPYBIND(implicit_conversion) :
rant_t(val)
{}
};
struct GENPYBIND(inline_base("*NodeIdMixin*")) ExtollInterruptConfigOnExtollNetwork
: public NodeIdMixin<ExtollInterruptConfigOnExtollNetwork, ExtollInterruptConfigOnExtollNodeId>
{
ExtollInterruptConfigOnExtollNetwork() = default;
explicit ExtollInterruptConfigOnExtollNetwork(
ExtollInterruptConfigOnExtollNodeId const& config,
ExtollNodeIdOnExtollNetwork const& nodeid =
ExtollNodeIdOnExtollNetwork(halco::hicann_dls::vx::ExtollNodeIdOnExtollNetwork::self)) :
mixin_t(config, nodeid)
{}
explicit ExtollInterruptConfigOnExtollNetwork(enum_type const& e) : mixin_t(e) {}
ExtollInterruptConfigOnExtollNodeId toExtollInterruptConfigOnExtollNodeId() const
{
return This();
}
};
struct GENPYBIND(inline_base("*")) ExtollBarrierInterruptInportErrorCountOnFPGA
: public common::detail::
RantWrapper<ExtollBarrierInterruptInportErrorCountOnFPGA, uint_fast8_t, 0, 0>
{
constexpr explicit ExtollBarrierInterruptInportErrorCountOnFPGA(uintmax_t const val = 0)
GENPYBIND(implicit_conversion) :
rant_t(val)
{}
};
struct GENPYBIND(inline_base("*")) ExtollBarrierInterruptInportCounterResetOnFPGA
: public common::detail::
RantWrapper<ExtollBarrierInterruptInportCounterResetOnFPGA, uint_fast8_t, 0, 0>
{
constexpr explicit ExtollBarrierInterruptInportCounterResetOnFPGA(uintmax_t const val = 0)
GENPYBIND(implicit_conversion) :
rant_t(val)
{}
};
} // namespace halco::hicann_dls::vx
namespace std {
HALCO_GEOMETRY_HASH_CLASS(halco::hicann_dls::vx::ExtollAddress)
HALCO_GEOMETRY_HASH_CLASS(halco::hicann_dls::vx::ExtollNodeId)
HALCO_GEOMETRY_HASH_CLASS(halco::hicann_dls::vx::ExtollChipType)
HALCO_GEOMETRY_HASH_CLASS(halco::hicann_dls::vx::ExtollNodeIdOnExtollNetwork)
HALCO_GEOMETRY_HASH_CLASS(halco::hicann_dls::vx::ExtollAddressOnExtollNetwork)
HALCO_GEOMETRY_HASH_CLASS(halco::hicann_dls::vx::ExtollBarrierTriggerReachedOnExtollNodeId)
HALCO_GEOMETRY_HASH_CLASS(halco::hicann_dls::vx::ExtollBarrierTriggerReachedOnExtollNetwork)
HALCO_GEOMETRY_HASH_CLASS(halco::hicann_dls::vx::ExtollBarrierReleasedOnExtollNodeId)
HALCO_GEOMETRY_HASH_CLASS(halco::hicann_dls::vx::ExtollBarrierReleasedOnExtollNetwork)
HALCO_GEOMETRY_HASH_CLASS(halco::hicann_dls::vx::LinkOnExtollNode)
HALCO_GEOMETRY_HASH_CLASS(halco::hicann_dls::vx::ExtollBarrierConfigOnExtollNodeId)
HALCO_GEOMETRY_HASH_CLASS(halco::hicann_dls::vx::ExtollBarrierConfigOnExtollNetwork)
HALCO_GEOMETRY_HASH_CLASS(halco::hicann_dls::vx::ExtollInterruptControlOnExtollNodeId)
HALCO_GEOMETRY_HASH_CLASS(halco::hicann_dls::vx::ExtollInterruptControlOnExtollNetwork)
HALCO_GEOMETRY_HASH_CLASS(halco::hicann_dls::vx::ExtollInterruptConfigOnExtollNodeId)
HALCO_GEOMETRY_HASH_CLASS(halco::hicann_dls::vx::ExtollInterruptConfigOnExtollNetwork)
HALCO_GEOMETRY_HASH_CLASS(halco::hicann_dls::vx::ExtollBarrierInterruptInportErrorCountOnFPGA)
HALCO_GEOMETRY_HASH_CLASS(halco::hicann_dls::vx::ExtollBarrierInterruptInportCounterResetOnFPGA)
HALCO_GEOMETRY_HASH_CLASS(halco::hicann_dls::vx::EventSwitchSourceOnFPGA)
......
include/halco/hicann-dls/vx/v2/coordinates.def
+ 17
− 0
View file @ e6590208
......@@ -75,6 +75,23 @@ COORDINATE(FPGASystimeSyncLastAsicSystimeOnFPGA, halco::hicann_dls::vx::v2::FPGA
COORDINATE(FPGASystimeSyncActiveStateOnFPGA, halco::hicann_dls::vx::v2::FPGASystimeSyncActiveStateOnFPGA)
COORDINATE(EventSwitchSourceOnFPGA, halco::hicann_dls::vx::v2::EventSwitchSourceOnFPGA)
COORDINATE(ExtollAddress, halco::hicann_dls::vx::v2::ExtollAddress)
COORDINATE(ExtollChipType, halco::hicann_dls::vx::v2::ExtollChipType)
COORDINATE(ExtollNodeId, halco::hicann_dls::vx::v2::ExtollNodeId)
COORDINATE(ExtollNodeIdOnExtollNetwork, halco::hicann_dls::vx::v2::ExtollNodeIdOnExtollNetwork)
COORDINATE(ExtollAddressOnExtollNetwork, halco::hicann_dls::vx::v2::ExtollAddressOnExtollNetwork)
COORDINATE(ExtollBarrierTriggerReachedOnExtollNodeId, halco::hicann_dls::vx::v2::ExtollBarrierTriggerReachedOnExtollNodeId)
COORDINATE(ExtollBarrierTriggerReachedOnExtollNetwork, halco::hicann_dls::vx::v2::ExtollBarrierTriggerReachedOnExtollNetwork)
COORDINATE(ExtollBarrierReleasedOnExtollNodeId, halco::hicann_dls::vx::v2::ExtollBarrierReleasedOnExtollNodeId)
COORDINATE(ExtollBarrierReleasedOnExtollNetwork, halco::hicann_dls::vx::v2::ExtollBarrierReleasedOnExtollNetwork)
COORDINATE(LinkOnExtollNode, halco::hicann_dls::vx::v2::LinkOnExtollNode)
COORDINATE(ExtollBarrierConfigOnExtollNodeId, halco::hicann_dls::vx::v2::ExtollBarrierConfigOnExtollNodeId)
COORDINATE(ExtollBarrierConfigOnExtollNetwork, halco::hicann_dls::vx::v2::ExtollBarrierConfigOnExtollNetwork)
COORDINATE(ExtollInterruptControlOnExtollNodeId, halco::hicann_dls::vx::v2::ExtollInterruptControlOnExtollNodeId)
COORDINATE(ExtollInterruptControlOnExtollNetwork, halco::hicann_dls::vx::v2::ExtollInterruptControlOnExtollNetwork)
COORDINATE(ExtollInterruptConfigOnExtollNodeId, halco::hicann_dls::vx::v2::ExtollInterruptConfigOnExtollNodeId)
COORDINATE(ExtollInterruptConfigOnExtollNetwork, halco::hicann_dls::vx::v2::ExtollInterruptConfigOnExtollNetwork)
COORDINATE(ExtollBarrierInterruptInportErrorCountOnFPGA, halco::hicann_dls::vx::v2::ExtollBarrierInterruptInportErrorCountOnFPGA)
COORDINATE(ExtollBarrierInterruptInportCounterResetOnFPGA, halco::hicann_dls::vx::v2::ExtollBarrierInterruptInportCounterResetOnFPGA)
COORDINATE(ExtollSpikeCommBucketTriggerConfigOnFPGA, halco::hicann_dls::vx::v2::ExtollSpikeCommBucketTriggerConfigOnFPGA)
COORDINATE(ExtollSpikeCommBucketDestinationConfigOnFPGA, halco::hicann_dls::vx::v2::ExtollSpikeCommBucketDestinationConfigOnFPGA)
COORDINATE(ExtollSpikeCommBucketNumPktsSentOnFPGA, halco::hicann_dls::vx::v2::ExtollSpikeCommBucketNumPktsSentOnFPGA)
......
include/halco/hicann-dls/vx/v2/extoll.h
+ 31
− 0
View file @ e6590208
......@@ -6,6 +6,37 @@ namespace halco::hicann_dls::vx::v2 GENPYBIND_TAG_HALCO_HICANN_DLS_VX_V2 {
using EventSwitchSourceOnFPGA GENPYBIND(visible) = halco::hicann_dls::vx::EventSwitchSourceOnFPGA;
using ExtollAddress GENPYBIND(visible) = halco::hicann_dls::vx::ExtollAddress;
using ExtollChipType GENPYBIND(visible) = halco::hicann_dls::vx::ExtollChipType;
using ExtollNodeId GENPYBIND(visible) = halco::hicann_dls::vx::ExtollNodeId;
using ExtollNodeIdOnExtollNetwork GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollNodeIdOnExtollNetwork;
using ExtollAddressOnExtollNetwork GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollAddressOnExtollNetwork;
using ExtollBarrierTriggerReachedOnExtollNodeId GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollBarrierTriggerReachedOnExtollNodeId;
using ExtollBarrierTriggerReachedOnExtollNetwork GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollBarrierTriggerReachedOnExtollNetwork;
using ExtollBarrierReleasedOnExtollNodeId GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollBarrierReleasedOnExtollNodeId;
using ExtollBarrierReleasedOnExtollNetwork GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollBarrierReleasedOnExtollNetwork;
using LinkOnExtollNode GENPYBIND(visible) = halco::hicann_dls::vx::LinkOnExtollNode;
using ExtollBarrierConfigOnExtollNodeId GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollBarrierConfigOnExtollNodeId;
using ExtollBarrierConfigOnExtollNetwork GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollBarrierConfigOnExtollNetwork;
using ExtollInterruptControlOnExtollNodeId GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollInterruptControlOnExtollNodeId;
using ExtollInterruptControlOnExtollNetwork GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollInterruptControlOnExtollNetwork;
using ExtollInterruptConfigOnExtollNodeId GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollInterruptConfigOnExtollNodeId;
using ExtollInterruptConfigOnExtollNetwork GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollInterruptConfigOnExtollNetwork;
using ExtollBarrierInterruptInportErrorCountOnFPGA GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollBarrierInterruptInportErrorCountOnFPGA;
using ExtollBarrierInterruptInportCounterResetOnFPGA GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollBarrierInterruptInportCounterResetOnFPGA;
using ExtollSpikeCommBucketTriggerConfigOnFPGA GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollSpikeCommBucketTriggerConfigOnFPGA;
using ExtollSpikeCommBucketDestinationConfigOnFPGA GENPYBIND(visible) =
......
include/halco/hicann-dls/vx/v3/coordinates.def
+ 17
− 0
View file @ e6590208
......@@ -75,6 +75,23 @@ COORDINATE(FPGASystimeSyncLastAsicSystimeOnFPGA, halco::hicann_dls::vx::v3::FPGA
COORDINATE(FPGASystimeSyncActiveStateOnFPGA, halco::hicann_dls::vx::v3::FPGASystimeSyncActiveStateOnFPGA)
COORDINATE(EventSwitchSourceOnFPGA, halco::hicann_dls::vx::v3::EventSwitchSourceOnFPGA)
COORDINATE(ExtollAddress, halco::hicann_dls::vx::v3::ExtollAddress)
COORDINATE(ExtollChipType, halco::hicann_dls::vx::v3::ExtollChipType)
COORDINATE(ExtollNodeId, halco::hicann_dls::vx::v3::ExtollNodeId)
COORDINATE(ExtollAddressOnExtollNetwork, halco::hicann_dls::vx::v3::ExtollAddressOnExtollNetwork)
COORDINATE(ExtollNodeIdOnExtollNetwork, halco::hicann_dls::vx::v3::ExtollNodeIdOnExtollNetwork)
COORDINATE(ExtollBarrierTriggerReachedOnExtollNodeId, halco::hicann_dls::vx::v3::ExtollBarrierTriggerReachedOnExtollNodeId)
COORDINATE(ExtollBarrierTriggerReachedOnExtollNetwork, halco::hicann_dls::vx::v3::ExtollBarrierTriggerReachedOnExtollNetwork)
COORDINATE(ExtollBarrierReleasedOnExtollNodeId, halco::hicann_dls::vx::v3::ExtollBarrierReleasedOnExtollNodeId)
COORDINATE(ExtollBarrierReleasedOnExtollNetwork, halco::hicann_dls::vx::v3::ExtollBarrierReleasedOnExtollNetwork)
COORDINATE(LinkOnExtollNode, halco::hicann_dls::vx::v3::LinkOnExtollNode)
COORDINATE(ExtollBarrierConfigOnExtollNodeId, halco::hicann_dls::vx::v3::ExtollBarrierConfigOnExtollNodeId)
COORDINATE(ExtollBarrierConfigOnExtollNetwork, halco::hicann_dls::vx::v3::ExtollBarrierConfigOnExtollNetwork)
COORDINATE(ExtollInterruptControlOnExtollNodeId, halco::hicann_dls::vx::v3::ExtollInterruptControlOnExtollNodeId)
COORDINATE(ExtollInterruptControlOnExtollNetwork, halco::hicann_dls::vx::v3::ExtollInterruptControlOnExtollNetwork)
COORDINATE(ExtollInterruptConfigOnExtollNodeId, halco::hicann_dls::vx::v3::ExtollInterruptConfigOnExtollNodeId)
COORDINATE(ExtollInterruptConfigOnExtollNetwork, halco::hicann_dls::vx::v3::ExtollInterruptConfigOnExtollNetwork)
COORDINATE(ExtollBarrierInterruptInportErrorCountOnFPGA, halco::hicann_dls::vx::v3::ExtollBarrierInterruptInportErrorCountOnFPGA)
COORDINATE(ExtollBarrierInterruptInportCounterResetOnFPGA, halco::hicann_dls::vx::v3::ExtollBarrierInterruptInportCounterResetOnFPGA)
COORDINATE(ExtollSpikeCommBucketTriggerConfigOnFPGA, halco::hicann_dls::vx::v3::ExtollSpikeCommBucketTriggerConfigOnFPGA)
COORDINATE(ExtollSpikeCommBucketDestinationConfigOnFPGA, halco::hicann_dls::vx::v3::ExtollSpikeCommBucketDestinationConfigOnFPGA)
COORDINATE(ExtollSpikeCommBucketNumPktsSentOnFPGA, halco::hicann_dls::vx::v3::ExtollSpikeCommBucketNumPktsSentOnFPGA)
......
include/halco/hicann-dls/vx/v3/extoll.h
+ 31
− 0
View file @ e6590208
......@@ -6,6 +6,37 @@ namespace halco::hicann_dls::vx::v3 GENPYBIND_TAG_HALCO_HICANN_DLS_VX_V3 {
using EventSwitchSourceOnFPGA GENPYBIND(visible) = halco::hicann_dls::vx::EventSwitchSourceOnFPGA;
using ExtollAddress GENPYBIND(visible) = halco::hicann_dls::vx::ExtollAddress;
using ExtollChipType GENPYBIND(visible) = halco::hicann_dls::vx::ExtollChipType;
using ExtollNodeId GENPYBIND(visible) = halco::hicann_dls::vx::ExtollNodeId;
using ExtollNodeIdOnExtollNetwork GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollNodeIdOnExtollNetwork;
using ExtollAddressOnExtollNetwork GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollAddressOnExtollNetwork;
using ExtollBarrierTriggerReachedOnExtollNodeId GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollBarrierTriggerReachedOnExtollNodeId;
using ExtollBarrierTriggerReachedOnExtollNetwork GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollBarrierTriggerReachedOnExtollNetwork;
using ExtollBarrierReleasedOnExtollNodeId GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollBarrierReleasedOnExtollNodeId;
using ExtollBarrierReleasedOnExtollNetwork GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollBarrierReleasedOnExtollNetwork;
using LinkOnExtollNode GENPYBIND(visible) = halco::hicann_dls::vx::LinkOnExtollNode;
using ExtollBarrierConfigOnExtollNodeId GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollBarrierConfigOnExtollNodeId;
using ExtollBarrierConfigOnExtollNetwork GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollBarrierConfigOnExtollNetwork;
using ExtollInterruptControlOnExtollNodeId GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollInterruptControlOnExtollNodeId;
using ExtollInterruptControlOnExtollNetwork GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollInterruptControlOnExtollNetwork;
using ExtollInterruptConfigOnExtollNodeId GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollInterruptConfigOnExtollNodeId;
using ExtollInterruptConfigOnExtollNetwork GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollInterruptConfigOnExtollNetwork;
using ExtollBarrierInterruptInportErrorCountOnFPGA GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollBarrierInterruptInportErrorCountOnFPGA;
using ExtollBarrierInterruptInportCounterResetOnFPGA GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollBarrierInterruptInportCounterResetOnFPGA;
using ExtollSpikeCommBucketTriggerConfigOnFPGA GENPYBIND(visible) =
halco::hicann_dls::vx::ExtollSpikeCommBucketTriggerConfigOnFPGA;
using ExtollSpikeCommBucketDestinationConfigOnFPGA GENPYBIND(visible) =
......
pyhalco/test/pyhalco_test_hicann_dls_vx_v2.py
+ 17
− 0
View file @ e6590208
......@@ -172,6 +172,23 @@ class Test_PyhalcoHICANNDLSvx(unittest.TestCase, PyhalcoTest):
FPGASystimeSyncActiveStateOnFPGA => linear,iterable
EventSwitchSourceOnFPGA => linear,iterable
ExtollAddress => linear
ExtollChipType => linear,iterable
ExtollNodeId => linear
ExtollNodeIdOnExtollNetwork => linear
ExtollAddressOnExtollNetwork => linear
ExtollBarrierTriggerReachedOnExtollNodeId => linear,iterable
ExtollBarrierTriggerReachedOnExtollNetwork => linear,iterable
ExtollBarrierReleasedOnExtollNodeId => linear,iterable
ExtollBarrierReleasedOnExtollNetwork => linear,iterable
LinkOnExtollNode => linear,iterable
ExtollBarrierConfigOnExtollNodeId => linear,iterable
ExtollBarrierConfigOnExtollNetwork => linear,iterable
ExtollInterruptControlOnExtollNodeId => linear,iterable
ExtollInterruptControlOnExtollNetwork => linear,iterable
ExtollInterruptConfigOnExtollNodeId => linear,iterable
ExtollInterruptConfigOnExtollNetwork => linear,iterable
ExtollBarrierInterruptInportErrorCountOnFPGA => linear,iterable
ExtollBarrierInterruptInportCounterResetOnFPGA => linear,iterable
ExtollSpikeCommBucketTriggerConfigOnFPGA => linear,iterable
ExtollSpikeCommBucketDestinationConfigOnFPGA => linear,iterable
ExtollSpikeCommBucketNumPktsSentOnFPGA => linear,iterable
......
pyhalco/test/pyhalco_test_hicann_dls_vx_v3.py
+ 17
− 0
View file @ e6590208
......@@ -172,6 +172,23 @@ class Test_PyhalcoHICANNDLSvx(unittest.TestCase, PyhalcoTest):
FPGASystimeSyncActiveStateOnFPGA => linear,iterable
EventSwitchSourceOnFPGA => linear,iterable
ExtollAddress => linear
ExtollChipType => linear,iterable
ExtollNodeId => linear
ExtollNodeIdOnExtollNetwork => linear
ExtollAddressOnExtollNetwork => linear
ExtollBarrierTriggerReachedOnExtollNodeId => linear,iterable
ExtollBarrierTriggerReachedOnExtollNetwork => linear,iterable
ExtollBarrierReleasedOnExtollNodeId => linear,iterable
ExtollBarrierReleasedOnExtollNetwork => linear,iterable
LinkOnExtollNode => linear,iterable
ExtollBarrierConfigOnExtollNodeId => linear,iterable
ExtollBarrierConfigOnExtollNetwork => linear,iterable
ExtollInterruptControlOnExtollNodeId => linear,iterable
ExtollInterruptControlOnExtollNetwork => linear,iterable
ExtollInterruptConfigOnExtollNodeId => linear,iterable
ExtollInterruptConfigOnExtollNetwork => linear,iterable
ExtollBarrierInterruptInportErrorCountOnFPGA => linear,iterable
ExtollBarrierInterruptInportCounterResetOnFPGA => linear,iterable
ExtollSpikeCommBucketTriggerConfigOnFPGA => linear,iterable
ExtollSpikeCommBucketDestinationConfigOnFPGA => linear,iterable
ExtollSpikeCommBucketNumPktsSentOnFPGA => linear,iterable
......
pyhalco/wscript
+ 1
− 0
View file @ e6590208
......@@ -87,6 +87,7 @@ def build(bld):
use='pyhalco_hicann_dls_vx_v%s' % hx_version,
install_path='${PREFIX}/bin',
pythonpath=['test'],
test_timeout=120,
)
else:
......
src/halco/hicann-dls/vx/extoll.cpp
+ 4
− 0
View file @ e6590208
......@@ -6,4 +6,8 @@ EventSwitchSourceOnFPGA const EventSwitchSourceOnFPGA::to_executor{0};
EventSwitchSourceOnFPGA const EventSwitchSourceOnFPGA::to_asic{1};
EventSwitchSourceOnFPGA const EventSwitchSourceOnFPGA::to_external{2};
ExtollNodeId const ExtollNodeId::self{0x10000ull};
ExtollChipType const ExtollChipType::fpga{0};
ExtollChipType const ExtollChipType::tourmalet{1};
}
\ No newline at end of file
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